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• Specifications

1M Multibus

 One megabyte of zero-wait-state memory with parity, consisting of
  144 64K x 1-bit chips.  Connected to the processor by the Multibus P2
  connector only; the Multibus P1 connector is used only for +5V and ground
  connections.

 Eight-position DIP switch U506 controls the address at which the board
  appears.  The switches are all mutually exclusive.  To make the board the
  first megabyte (starting at address 0), turn switch 1 ON and all others OFF.
  To make the board the second megabyte (starting at address 0x100000), turn
  switch 2 ON and all others OFF, etc.  Via this method, the board may be set
  for any megabyte from the first to the eighth; the eighth is only available
  for memory when a monochrome display board is not present in the system.

 Power requirements are +5V @ 3A.

  

   Last modified: 2000.10.25.19.46.48 CDT
     Server time: 2012.02.09.18.59.02 GMT