• Specifications

4/10/15 (SPARCclassic X/SPARCclassic) motherboard 0M

 50 MHz microSPARC.  20MHz SBus.

 This board is an unusual shape. On one edge are edge connectors.  All
  directions below are given assuming the component side up and the edge
  connectors toward you.

 There are no jumpers.

 The onboard video produces analog color output at the following resolution and
  sync frequencies: 1152 x 900 @ 61.8KHz horizontal, 66Hz vertical; 1152 x 900
  @ 71.7KHz horizontal, 76Hz vertical; and 1024 x 768 @ 61.8KHz horizontal,
  77Hz vertical.

 Memory consists of up to six SIMMs, in three pairs.  1M (501-2289), 2M
  (501-2433), 4M (501-1991), and 16M (501-2059) 60ns SIMMs are documented for
  SPARCclassic X models; only 4M and 16M SIMMs are documented for the
  SPARCclassic proper.  SIMM types may be mixed, and should be installed
  according to this table:

               bank1   bank2   bank3   bank1   bank2   bank3
  total RAM    U0304   U0301   U0402   U0303   U0302   U0401
  ---------    -----   -----   -----   -----   -----   -----
     8M     X   1M      1M      2M      1M      1M      2M
      or    X   2M      2M              2M      2M
      or    X   4M                      4M
     12M    X   1M      1M      4M      1M      1M      4M
      or    X   2M      4M              2M      4M
      or    X   2M      2M      2M      2M      2M      2M
     16M        4M      4M              4M      4M
      or    X   2M      2M      4M      2M      2M      4M
     20M    X   2M      4M      4M      2M      4M      4M
     24M        4M      4M      4M      4M      4M      4M
     32M        16M                     16M
     36M    X   1M      1M      16M     1M      1M      16M
      or    X   2M      16M             2M      16M
     40M    X   2M      2M      16M     2M      2M      16M
      or     *  4M      16M             4M      16M
     44M    X   2M      4M      16M     2M      4M      16M
     48M     *  4M      4M      16M     4M      4M      16M
      or    C   16M     4M      4M      16M     4M      4M
     64M        16M     16M             16M     16M
     72M     *  4M      16M     16M     4M      16M     16M
     96M        16M     16M     16M     16M     16M     16M

  Rows marked with 'X' are documented for the SPARCclassic X only.  Rows marked
   with 'C' are documented for the SPARCclassic proper only.  Rows marked with
   '*' do not work under SunOS 4.1.3c.  "Put 16MB SIMMs in Bank 1."

 Additional features of interest: the boot PROM is a PLCC toward the middle
  left edge, at location U0701.  The NVRAM is to the left of the boot PROM at
  location U0707.  Ethernet fuse F1703 and keyboard fuse F1701 are in the near
  left corner.  The SCSI TERMPWR fuse F0601 is toward the near right corner.
  All fuses are non-replaceable PTC devices.  Along the far edge, from left to
  right, are the power, speaker/LED, floppy, and internal SCSI connectors.

 Note that the SPARCclassic/SPARCclassic X was first supported in SunOS 4.1.3c.

  

   Last modified: 2000.12.07.22.56.50 CST
     Server time: 2008.07.05.09.27.26 GMT