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SPARCstation 20


Aliases  
Date  
CPUs 1 - 4
Clock speed 33, 36, 40, 50, 60, 75, 90, 125, 150, 180, 200 MHz
Processor Mbus SPARCmodule   (microSPARC, hyperSPARC)
Co-processor  
MMU  
Motherboard  
On-chip cache  
External cache Up to 1 MB / Mbus module.
Memory 512 MB
16 MB, 32 MB or 64 MB 60ns SIMMs.
Speed @ 50 MHz:   69.2 SPECint92,   78.3 SPECfp92,   1628 SPECintRate92,   1842 SPECfpRate92
@ 50 MHz (x2):   2833 SPECintRate92,   2995 SPECfpRate92
@ 50 MHz + 1 MB:   73.6 SPECint92,   84.8 SPECfp92,   1731 SPECintRate92,   1995 SPECfpRate92
@ 50 MHz + 1 MB (x4):   6034 SPECintRate92,   6752 SPECfpRate92
@ 60 MHz + 1 MB:   88.9 SPECint92,   102.8 SPECfp92,   2092 SPECintRate92,   2418 SPECfpRate92
@ 60 MHz + 1 MB (x2):   3903 SPECintRate92,   4645 SPECfpRate92
Chassis type pizzabox
Bus (2) Mbus slots.
(4) Sbus slots,   25 MHz / 64 bits for models 50 and 61 (and possibly others?).
Ports  
Internal storage SCA connectors for internal SCSI.
Graphics  
Power supply  
Architecture sun4m
OS's supported  
Notes Code name "Kodiak".
Comments  
See also..  




















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